1. Field of the Invention
The present invention relates to a multilayer wiring board, and more particularly, to a multilayer wiring board incorporating a stacked via structure.
2. Description of the Related Art
A conventional, well-known type of multilayer wiring board is configured such that conductor patterns of different layers are connected through a via formed in a resin dielectric layer. In recent years, in order to reduce the size of a wiring board, for example, there have been proposed various kinds of multilayer wiring boards having a stacked via structure in which a plurality of filled vias are stacked substantially coaxially in a resin dielectric layer. (Reference is made, for example, to Japanese Patent Application Laid-Open (kokai) No. 2000-101243 (e.g., FIG. 8).)
Such conventional multilayer wiring boards have exhibited a tendency toward cracking in a stacked via structure of a particular type, resulting in impaired reliability. The present inventor has extensively studied the problem and found that stacked via structures suffering cracking had the following trait in common: the opposite ends of a stacked via structure are connected directly to corresponding planar conductor layers (so-called solid patterns) which are located in a resin dielectric layer and on an outer surface of the resin dielectric layer, and which have a relatively large area. This study also revealed that as the thickness of a resin dielectric layer increased with the number of stacked filled vias, the occurrence of cracking tended to become more noticeable.